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INTEGRATED CIRCUITS PCK2111 1:10 LVDS clock distribution device Product Data Supersedes data of 2002 May 14 2002 Dec 16 Philips Semiconductors Philips Semiconductors Product data 1:10 LVDS clock distribution device PCK2111 FEATURES * 100 ps part-to-part skew * 35 ps output-to-output skew * Differential design * Meets LVDS specification for driver outputs and receiver inputs * Reference voltage available output VBB * Low voltage VCC range of +2.375 V to 2.625 V * High signalling rate capability (above 622 MHz) * Supports open, short, and terminated input fail-safe (HIGH output state) PIN CONFIGURATION 25 GND 24 Q3 23 Q3 22 Q4 21 Q4 20 Q5 19 Q5 18 Q6 17 Q6 Q9 10 Q8 12 Q8 13 Q7 14 Q7 15 GND 9 V CC 16 ST00013 Q9 11 32 V CC 31 Q0 30 Q0 29 Q1 28 Q1 27 Q2 26 Q2 CK SI CLK0 CLK0 VBB CLK1 CLK1 EN 1 2 3 4 5 6 7 8 * Programmable drivers power off control * PCK2111 is identical to and replaces PTN2111 * Available in LQFP32 package DESCRIPTION The PCK2111 is a low skew programmable 1:10 LVDS clock distribution device. The selected input signal is fanned out to 10 identical differential outputs. The PCK2111 features an 11-bit Shift Register with a serial-in and a Control Register. The purpose of the Control Register is to enable or power off each output clock channel and to select the clock input. The PCK2111 is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate-to-gate skew within a device. The final result is a dependable guaranteed low skew device. The PCK2111 can be used for high performance clock distribution in +2.5 V systems with LVDS levels. Designers can take advantage of the device's performance to distribute low skew clocks across the backplane or the board. PIN DESCRIPTION PIN NUMBER 1 2 3 4 5 6 7 8 9, 25 16, 32 31, 29, 27, 24, 22, 20, 18, 15, 13, 11 30, 28, 26, 23, 21, 19, 17, 14, 12, 10 SYMBOL CK SI CLK0 CLK0 VBB CLK1 CLK1 EN GND VCC Q[0:9] NAME AND FUNCTION Control register clock Control register serial-in/CLK_SEL Differential input Differential input Output reference voltage Differential input Differential input Device enable/program Ground Supply voltage Differential outputs Q[0:9] Differential outputs TYPE NUMBER PCK2111BD NAME LQFP32 DESCRIPTION Plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm VERSION SOT358-1 2002 Dec 16 2 Philips Semiconductors Product data 1:10 LVDS clock distribution device PCK2111 LOGIC DIAGRAM SI EN Control Register 11-Bit 10 0 1 SEL CLK0 CLK1 0 1 Q9 9876543210 Counter 12 Shift Register 11-Bit CK Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 ST00010 2002 Dec 16 3 Philips Semiconductors Product data 1:10 LVDS clock distribution device PCK2111 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. SYMBOL VCC IOSD ESD Tj Supply voltage Driver short circuit current Electrostatic discharge (Human Body Model 1.5 k, 100 pF) Junction temperature PARAMETER LIMITS -0.3 to 2.8 continuous >2 150 kV C UNIT V RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VIR Tamb Supply voltage Receiver input voltage Operating ambient temperature range in free air PARAMETER MIN 2.375 GND -40 MAX 2.625 VCC +85 C UNIT V DC ELECTRICAL CHARACTERISTICS Tamb = -40 C to +85 C unless otherwise specified; VCC = 2.5 V 5% (Notes 1, 2) SYMBOL Driver VOD VOD VOS VOS IOSD Receiver VIDH VIDL IIN Device VBB ICCD CIN COUT VIH VIL II Output reference voltage Power supply current Input capacitance Output capacitance Logic input HIGH threshold Logic input LOW threshold Logic input current VCC = 2.5 V VCC = 2.5 V VCC = 2.5 V; VIN = VCC or GND VCC = 2.5 V; IOUT 100 A All drivers enabled and loaded; input frequency = 800 MHz VIN = 0 V to VCC 1.15 -- -- -- 2 -- -- 1.25 190 5 5 -- -- -- 1.35 230 -- -- -- 0.8 10 V mA pF pF V V A Input threshold HIGH Input threshold LOW Input current VIN = 0 V VIN = VCC -- -100 -- -- -- -- 50 50 100 -- 100 100 mV mV A A Output differential voltage VOD magnitude change Offset voltage VOS magnitude change Output short circuit current RL = 100 RL = 100 RL = 100 RL = 100 VO = 0 V VOD = 0 V 250 -- 1.125 -- -- -- 350 -- 1.25 -- 15 7 450 50 1.375 50 40 15 mV mV V mV mA mA PARAMETER CONDITIONS MIN TYP2 MAX UNIT NOTES: 1. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 2. All typical values are given for VCC = +2.5 V and Tamb = +25 C, unless otherwise specified. 3. CL includes probe and fixture capacitance. 4. Generator waveforms for all tests unless otherwise specified: f = 1 MHz, ZO = 50 , 50% duty cycle. 5. The PCK2111 is a current mode device, and only functions to datasheet specifications when a resistive load is applied to the drives outputs. 2002 Dec 16 4 Philips Semiconductors Product data 1:10 LVDS clock distribution device PCK2111 AC ELECTRICAL CHARACTERISTICS (LVDS) Tamb = -40 C to +85 C unless otherwise specified; VCC = 2.5 V 5% (Note 1) PARAMETER CONDITIONS SYMBOL tTLH tTHL tPLH tPHL fMAX tskew tJITTER Transition time LOW to HIGH Transition time HIGH to LOW Propagation delay to output Maximum input frequency Within-device skew Part-to-part skew Pulse skew Cycle-to-cycle jitter RL = 100 ; CL = 5 pF RL = 100 ; CL = 5 pF MIN -- -- -- 650 -- -- -- -- TYP 460 460 -- 800 35 100 50 -- MAX 560 560 2 -- -- -- -- 1 UNIT ps ps ns MHz ps ps ps ps NOTE: 1. Generator waveforms for all tests unless otherwise specified: f = 1 MHz, ZO = 50 , 50% duty cycle. 2002 Dec 16 5 Philips Semiconductors Product data 1:10 LVDS clock distribution device PCK2111 CONTROL REGISTER SPECIFICATION The PCK2111 is provided with an 11-bit shift register with a serial-in and a Control Register. The purpose is to enable or power-off each output clock channel and to select the clock input. The PCK2111 provides two working modes: Programmed mode, and Standard mode. Table 1. Truth Table of State Machine Inputs EN L SI L CK X OUTPUT All outputs enabled, Clock0 selected, Control Register disabled. All outputs enabled, Clock1 selected, Control Register disabled. First stage stores "L", other stages store the data of previous stage. First stage stores "H", other stages store the data of previous stage. Reset of the state machine, Shift register, and Control Register. L H X Programmed Mode (EN = 1) The shift register has a serial input to load the working configuration. Once the configuration is loaded with 11 clock pulses, another clock pulse loads the configuration into the Control Register. To restart the configuration of the shift register, a reset of the state machine must be done with a clock pulse on CK, and the EN set to LOW. The Control Register can be configured only one time after each reset. D0 is the first bit shifted in, D10 is the last bit shifted in. Bit D0 controls Q9, D9 controls Q0, and D10 controls CLKIN. H L H H Standard Mode (EN = 0) In Standard Mode, the PCK2111 is not programmable. All clock buffer outputs are enabled. The LVDS clock input is selected from Clock0 or Clock1 with the SI pin, as shown in the Truth Table. L X Table 2. Configuration of the Control Register Control Register bit Function D0 Q9 D1 Q8 D2 Q7 D3 Q6 D4 Q5 D5 Q4 D6 Q3 D7 Q2 D8 Q1 D9 Q0 D10 CLK_SEL Table 3. Truth Table of the Control Register D10 L H X X = Don't Care Dn[0:9] H H L Qn[0:9] Clock0 Clock1 Qn output disabled AC ELECTRICAL CHARACTERISTICS (Control Register) SYMBOL fMAX ts th trem tw PARAMETER Maximum frequency of shift register Clock to SI setup time Clock to SI hold time Enable to clock removal time Minimum clock pulse width CONDITIONS MIN 50 -- -- -- 5 TYP -- -- -- -- -- MAX -- 4.0 1.0 4.0 -- UNIT MHz ns ns ns ns 2002 Dec 16 6 Philips Semiconductors Product data 1:10 LVDS clock distribution device PCK2111 LQFP32: plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm SOT358-1 2002 Dec 16 7 Philips Semiconductors Product data 1:10 LVDS clock distribution device PCK2111 REVISION HISTORY Rev Date _2 20021216 Description Product data (9397 750 10861); ECN 853-2345 29262 of 09 December 2002 Modifications: * Addition of jitter specification to datasheet. Product data (9397 750 09823); ECN 853-2345 28198 of 14 May 2002. _1 20020514 2002 Dec 16 8 Philips Semiconductors Product data 1:10 LVDS clock distribution device PCK2111 Data sheet status Level I Data sheet status[1] Objective data Product status[2] [3] Development Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products--including circuits, standard cells, and/or software--described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 12-02 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. Document order number: 9397 750 10861 Philips Semiconductors 2002 Dec 16 9 |
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